A piece of tuna nigiri sushi

Samuele Tondelli

I'm a final-year Master's student in Computer Science and Engineering at Politecnico di Milano, interested in making machine-learning systems faster through GPU performance engineering and low-level systems work. My current thesis focuses on optimizing GPU inference for a graph transformer used in protein docking. Previously, I designed a custom FPGA accelerator for autonomous deep-space satellites and developed embedded and telemetry software for Formula SAE. I'm looking for internships and research opportunities in ML systems, GPU computing, and performance engineering, feel free to reach out!

Current Work

Master's Thesis: GPU Inference for Protein Docking I'm working on making graph transformer inference for protein docking faster on GPUs.

For my thesis at Politecnico di Milano I'm optimizing a graph transformer for protein docking, with LibTorch C++ and TensorRT backends running on an NVIDIA A100. Profiling with Nsight Systems showed that host-device synchronization was a bottleneck, which I removed to bring the forward pass from 63 ms to 12 ms. I also fused the full graph attention in Triton using sparse CSC indices, reducing its latency from 190 µs to 46 µs compared to PyTorch. This is still in active development!

Experiences

Student Researcher | Genomic ML | Paper accepted at IEEE EMBC 2026 (Paper No. 3391) Sep 2025 - Feb 2026 I compared machine learning approaches for genomic variant classification at NECSTLab, Politecnico di Milano.

At NECSTLab I benchmarked MLPs, XGBoost, logistic regression and random forests across 144 genomic datasets to compare how they classify single nucleotide variants. I also reduced training time from 24 s to 2.6 s and peak RAM from 2.28 GB to 0.30 GB, with minimal impact on test performance. For variants of uncertain significance, 72 models trained without those variants showed 90% average pairwise agreement on pathogenicity predictions. This work led to a paper accepted at IEEE EMBC 2026.

Student Researcher | FPGA Deep Space Mar 2025 - Sep 2025 I worked on an FPGA accelerator for autonomous deep-space satellite navigation at NECSTLab, Politecnico di Milano.

At NECSTLab I worked on accelerating ECOS, a library used for autonomous navigation of deep-space satellites. I focused on the sparse matrix computations, building SpMV and LDLT kernels with Vitis HLS and Vivado, then deploying them on a Kria KD240 with a Linux driver written in C. The accelerator achieved a 2× speedup over software, and we entered the project in the 2025 AMD Open Hardware competition.

Software Engineer Intern | Formula SAE Mar 2023 - May 2024 I worked on embedded software and live telemetry for Formula SAE cars at More Modena Racing, University of Modena and Reggio Emilia.

At More Modena Racing I co-led a team of four working on software for combustion and hybrid Formula SAE cars. I built a wireless telemetry system using a Raspberry Pi 5 and Grafana, which let us monitor the car live at 1 Mbps over 500 m. I also wrote the dashboard software on an STM32 controller, reading data from the car's CAN bus.

Articles

  1. From a scatter add to a fully fused graph attention kernel in Triton A scatter add issue in TensorRT lead me through an optimization journey, ending with a fully fused graph attention kernel in Triton 4x faster than PyTorch.

  2. Efficient graph representations for GPU inference

    Graph neural networks can achieve state-of-the-art results, however efficient inference requires making graphs GPU-friendly.

  3. Gradino: optimizing a CPU only autograd engine with AVX-512 and custom memory allocators

    In the past months I have built an autograd engine in C from scratch, optimizing the performance by using SIMD and reducing memory allocations overhead via arena allocators.